Dopingless Transistor Based Hybrid Oscillator Arbiter Physical Unclonable Function

Venkata P. Yanambaka; Saraju P. Mohanty; Elias Kougianos; Prabha Sundaravadivel; Jawar Singh

doi:10.1109/ISVLSI.2017.113

Dopingless Transistor Based Hybrid Oscillator Arbiter Physical Unclonable Function

Venkata P. Yanambaka, Saraju P. Mohanty, Elias Kougianos, Prabha Sundaravadivel, Jawar Singh

Engineering & Technology, School Of

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

5 Scopus citations

Abstract

Transistors are approaching the sub-10nm regime. Due to extensive scaling of devices, the leakage currents are also increasing. FinFETs are also being scaled to 14 nm. To further push the limits of scaling and decrease leakage currents, Dopingless FET (DL-FET) transistors were introduced. DL-FETs show a promising decrease in leakage with low power consumption. An application using these devices, a hybrid oscillator arbiter physical unclonable function (PUF) using DL-FETs is presented here. Two different designs, one speed optimized and one power optimized are presented for different designs such as low power and also high performance. A comparative analysis of the DL-FET based PUF and FinFET based PUF is presented. The DL-FET PUF results in a 30% decrease in average power consumption compared to FinFETs. To the best of the authors' knowledge, the current paper is the first in exploring PUF realization using DL-FETs.

Original language	English
Title of host publication	Proceedings - 2017 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2017
Editors	Ricardo Reis, Mircea Stan, Michael Huebner, Nikolaos Voros
Publisher	IEEE Computer Society
Pages	609-614
Number of pages	6
ISBN (Electronic)	9781509067626
DOIs	https://doi.org/10.1109/ISVLSI.2017.113
State	Published - Jul 20 2017
Event	2017 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2017 - Bochum, North Rhine-Westfalia, Germany Duration: Jul 3 2017 → Jul 5 2017

Publication series

Name	Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI
Volume	2017-July
ISSN (Print)	2159-3469
ISSN (Electronic)	2159-3477

Conference

Conference	2017 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2017
Country/Territory	Germany
City	Bochum, North Rhine-Westfalia
Period	07/3/17 → 07/5/17

Keywords

Dopingless Junctionless FET
Physical Unclonable Function
Ring Oscillator

Access to Document

10.1109/ISVLSI.2017.113

Cite this

Yanambaka, V. P., Mohanty, S. P., Kougianos, E., Sundaravadivel, P., & Singh, J. (2017). Dopingless Transistor Based Hybrid Oscillator Arbiter Physical Unclonable Function. In R. Reis, M. Stan, M. Huebner, & N. Voros (Eds.), Proceedings - 2017 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2017 (pp. 609-614). [7987589] (Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI; Vol. 2017-July). IEEE Computer Society. https://doi.org/10.1109/ISVLSI.2017.113

Yanambaka, Venkata P. ; Mohanty, Saraju P. ; Kougianos, Elias et al. / Dopingless Transistor Based Hybrid Oscillator Arbiter Physical Unclonable Function. Proceedings - 2017 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2017. editor / Ricardo Reis ; Mircea Stan ; Michael Huebner ; Nikolaos Voros. IEEE Computer Society, 2017. pp. 609-614 (Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI).

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title = "Dopingless Transistor Based Hybrid Oscillator Arbiter Physical Unclonable Function",

abstract = "Transistors are approaching the sub-10nm regime. Due to extensive scaling of devices, the leakage currents are also increasing. FinFETs are also being scaled to 14 nm. To further push the limits of scaling and decrease leakage currents, Dopingless FET (DL-FET) transistors were introduced. DL-FETs show a promising decrease in leakage with low power consumption. An application using these devices, a hybrid oscillator arbiter physical unclonable function (PUF) using DL-FETs is presented here. Two different designs, one speed optimized and one power optimized are presented for different designs such as low power and also high performance. A comparative analysis of the DL-FET based PUF and FinFET based PUF is presented. The DL-FET PUF results in a 30% decrease in average power consumption compared to FinFETs. To the best of the authors' knowledge, the current paper is the first in exploring PUF realization using DL-FETs.",

keywords = "Dopingless Junctionless FET, Physical Unclonable Function, Ring Oscillator",

author = "Yanambaka, {Venkata P.} and Mohanty, {Saraju P.} and Elias Kougianos and Prabha Sundaravadivel and Jawar Singh",

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Yanambaka, VP, Mohanty, SP, Kougianos, E, Sundaravadivel, P & Singh, J 2017, Dopingless Transistor Based Hybrid Oscillator Arbiter Physical Unclonable Function. in R Reis, M Stan, M Huebner & N Voros (eds), Proceedings - 2017 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2017., 7987589, Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI, vol. 2017-July, IEEE Computer Society, pp. 609-614, 2017 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2017, Bochum, North Rhine-Westfalia, Germany, 07/3/17. https://doi.org/10.1109/ISVLSI.2017.113

Dopingless Transistor Based Hybrid Oscillator Arbiter Physical Unclonable Function. / Yanambaka, Venkata P.; Mohanty, Saraju P.; Kougianos, Elias et al.

Proceedings - 2017 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2017. ed. / Ricardo Reis; Mircea Stan; Michael Huebner; Nikolaos Voros. IEEE Computer Society, 2017. p. 609-614 7987589 (Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI; Vol. 2017-July).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AU - Yanambaka, Venkata P.

AU - Mohanty, Saraju P.

AU - Kougianos, Elias

AU - Sundaravadivel, Prabha

AU - Singh, Jawar

PY - 2017/7/20

Y1 - 2017/7/20

N2 - Transistors are approaching the sub-10nm regime. Due to extensive scaling of devices, the leakage currents are also increasing. FinFETs are also being scaled to 14 nm. To further push the limits of scaling and decrease leakage currents, Dopingless FET (DL-FET) transistors were introduced. DL-FETs show a promising decrease in leakage with low power consumption. An application using these devices, a hybrid oscillator arbiter physical unclonable function (PUF) using DL-FETs is presented here. Two different designs, one speed optimized and one power optimized are presented for different designs such as low power and also high performance. A comparative analysis of the DL-FET based PUF and FinFET based PUF is presented. The DL-FET PUF results in a 30% decrease in average power consumption compared to FinFETs. To the best of the authors' knowledge, the current paper is the first in exploring PUF realization using DL-FETs.

AB - Transistors are approaching the sub-10nm regime. Due to extensive scaling of devices, the leakage currents are also increasing. FinFETs are also being scaled to 14 nm. To further push the limits of scaling and decrease leakage currents, Dopingless FET (DL-FET) transistors were introduced. DL-FETs show a promising decrease in leakage with low power consumption. An application using these devices, a hybrid oscillator arbiter physical unclonable function (PUF) using DL-FETs is presented here. Two different designs, one speed optimized and one power optimized are presented for different designs such as low power and also high performance. A comparative analysis of the DL-FET based PUF and FinFET based PUF is presented. The DL-FET PUF results in a 30% decrease in average power consumption compared to FinFETs. To the best of the authors' knowledge, the current paper is the first in exploring PUF realization using DL-FETs.

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Yanambaka VP, Mohanty SP, Kougianos E, Sundaravadivel P, Singh J. Dopingless Transistor Based Hybrid Oscillator Arbiter Physical Unclonable Function. In Reis R, Stan M, Huebner M, Voros N, editors, Proceedings - 2017 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2017. IEEE Computer Society. 2017. p. 609-614. 7987589. (Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI). doi: 10.1109/ISVLSI.2017.113

Dopingless Transistor Based Hybrid Oscillator Arbiter Physical Unclonable Function

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Keywords

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