Time to market is a vital aspect of electronic product development. When it comes to device technology, the time needed for the device fabrication processes to stabilize is relatively long. At the early stages of any device technology development, manufacturing variations are extensive. They are inevitable and unpredictable. Such manufacturing variations can be used advantageously to improve security and protect hardware and software IP. A physical unclonable function (PUF) uses the device manufacturing variations to extract unique and non-replicable keys which can be used for various applications such as cryptography and IP protection. This paper presents a hybrid oscillator arbiter PUF which uses the manufacturing variations of dopingless field-effect transistors (DLFETs) to achieve non-replicability and the results are compared with the more established FinFETs. The scalability of DLFETs is higher compared to current transistor technologies and the power consumption is lower. There is a 25% reduction in power consumption when compared to a 14 nm FinFET technology. The PUF designs presented in this paper are speed-optimized and power-optimized hybrid oscillator arbiter PUFs. The power-optimal design can be deployed in systems where power consumption should be low and the speed-optimal design can be implemented when speed of operation plays a vital role. Hence, these two designs can be deployed in two different application domains of current technologies such as the of Internet of Things.
- Manufacturing process variations
- dopingless junctionless FET
- hardware-Assisted security
- physical unclonable function (PUF)
- ring oscillator
- system security