TY - JOUR
T1 - Multiclass flow line models of semiconductor manufacturing equipment for fab-level simulation
AU - Morrison, James R.
N1 - Funding Information:
Manuscript received June 22, 2009; revised November 13, 2009; accepted January 06, 2010. Date of publication March 29, 2010; date of current version January 07, 2011. This paper was recommended for publication by Associate Editor Q. Zhao and Editor M. Zhou upon evaluation of the reviewers’ comments. This work was supported in part by the Korea Research Foundation (KRF) under Grant N01090250.
PY - 2011/1
Y1 - 2011/1
N2 - For multiclass flow line models, we identify a class of service times that allow a decomposition of the system into subsets of servers called channels. In each channel, the customer delay is well structured and we develop a recursion to calculate it. The recursions provide an alternative to the elementary evolution equations. By considering batch arrivals and restricting the structure of the model, the recursions can require nearly one order of magnitude less computation than is otherwise possible. Flow lines can be used as models for semiconductor manufacturing equipment such as multicluster or clustered photolithography tools. The models allow for internal wafer buffers and setups that are wafer location dependent. The models have shown to be very accurate in tests with data from clustered photolithography tools in production. As such, the models may serve as good candidates to improve the fidelity of existing equipment models in fablevel simulation.
AB - For multiclass flow line models, we identify a class of service times that allow a decomposition of the system into subsets of servers called channels. In each channel, the customer delay is well structured and we develop a recursion to calculate it. The recursions provide an alternative to the elementary evolution equations. By considering batch arrivals and restricting the structure of the model, the recursions can require nearly one order of magnitude less computation than is otherwise possible. Flow lines can be used as models for semiconductor manufacturing equipment such as multicluster or clustered photolithography tools. The models allow for internal wafer buffers and setups that are wafer location dependent. The models have shown to be very accurate in tests with data from clustered photolithography tools in production. As such, the models may serve as good candidates to improve the fidelity of existing equipment models in fablevel simulation.
KW - Fab-level simulation
KW - flow line
KW - photolithography cluster tools
KW - semiconductor manufacturing automation
UR - http://www.scopus.com/inward/record.url?scp=78651075546&partnerID=8YFLogxK
U2 - 10.1109/TASE.2010.2043733
DO - 10.1109/TASE.2010.2043733
M3 - Article
AN - SCOPUS:78651075546
SN - 1545-5955
VL - 8
SP - 81
EP - 94
JO - IEEE Transactions on Automation Science and Engineering
JF - IEEE Transactions on Automation Science and Engineering
IS - 1
M1 - 5439921
ER -